Transistor scaling and innovations
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작성자 최고관리자 댓글 조회 작성일 24-03-15 11:26본문
- 강연자
- 박근우 (Intel)
BK21 지능형반도체 IT 융합 혁신인재 양성사업단 세미나
제목 : Transistor scaling and innovations
연사 : 박근우 (Intel)
일시 : 2024년 3월 22일 금요일 11시
장소 : 제4공학관 D504호
내용 : Historically transistor scaling has been decided by channel length/width, oxide, channel doping and voltage scale. However, given well-known transistor scaling factors are hard to provide further scaling benefit anymore, so that modern scaling paths are introduced to continue the performance and transistor density scaling post 2000. As transistor gets scaled and encounters the scaling barriers. We would like to review the recent efforts to overcome such scaling barriers and what could be the next.
제목 : Transistor scaling and innovations
연사 : 박근우 (Intel)
일시 : 2024년 3월 22일 금요일 11시
장소 : 제4공학관 D504호
내용 : Historically transistor scaling has been decided by channel length/width, oxide, channel doping and voltage scale. However, given well-known transistor scaling factors are hard to provide further scaling benefit anymore, so that modern scaling paths are introduced to continue the performance and transistor density scaling post 2000. As transistor gets scaled and encounters the scaling barriers. We would like to review the recent efforts to overcome such scaling barriers and what could be the next.
